摘要 |
A fully differential amplifier includes: an N-stage amplifier including first to Nth amplifier stages, where N is a positive integer greater than or equal to 2, the first to Nth amplifier stages being cascaded in sequence so as to generate a pair of differential output voltages; a common mode feedback circuit coupled to the N-stage amplifier, detecting a common mode level of the differential output voltages, and controlling the first amplifier stage according to the common mode level detected thereby; and a common mode frequency compensation circuit including a pair of capacitors, each having a first terminal coupled to the N-stage amplifier to receive a respective one of the differential output voltages, and a second terminal coupled to a common mode node of the first to (N-1)th amplifier stages of the N-stage amplifier.
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