发明名称 DATA CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide common terminals to which serial data and parallel data are both input. SOLUTION: A data control circuit includes a first input terminal to which first bit data of first multi-bit parallel data including first to third bit data and the serial data are input, a second input terminal to which second bit data and a clock of prescribed frequency are input, a third input terminal to which third bit data are input, a decision circuit which decides whether the third bit data are input to the third input terminal, a plurality of output terminals corresponding to the plurality of bits, and an output circuit which outputs the first parallel data from the plurality of output terminals on the basis of a decision result of the decision circuit indicating that the third bit data are input, and converts the serial data input according to the clock into second multi-bit parallel data and then outputs the second parallel data from the plurality of output terminals on the basis of a decision result of the decision circuit indicating that the third bit data are not input. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008283299(A) 申请公布日期 2008.11.20
申请号 JP20070123757 申请日期 2007.05.08
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 KATO TAKUJI;MEYA MASATO;SERIZAWA SHUNSUKE
分类号 H04L29/08;H03M9/00;H04L29/00 主分类号 H04L29/08
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