发明名称 DETECTION OF TRANSIENT ERRORS BY MEANS OF NEW SELECTIVE IMPLEMENTATION
摘要 In one embodiment, the present invention includes a method for determining a degree or level of vulnerability for an instruction implemented by a processor and for re-implementing the instruction if the level of vulnerability is above a certain threshold. The level of vulnerability may correspond to a logic error probability for the instruction whilst the instruction is within the processor. Other embodiments are described and claimed.
申请公布号 KR20080098683(A) 申请公布日期 2008.11.11
申请号 KR20087023877 申请日期 2006.03.31
申请人 INTEL CORP. 发明人 VERA XAVIER;ERGIN OGUZ;UNSAL OSMAN;ABELLA JAUME;GONZALEZ ANTONIO
分类号 G06F11/14;G06F9/30;G06F11/07 主分类号 G06F11/14
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