发明名称 PROCESSOR
摘要 PROBLEM TO BE SOLVED: To validly avoid stopping of an operation due to the deviation from an operating temperature guarantee range in a processor using a gate array capable of reconfiguring an internal logic circuit. SOLUTION: A configuration part 2 stores a plurality of setting data, and sets the circuit configurations of an FPGA1 on the basis of any of the plurality of setting data. Temperature detection parts 3 an 4 detect temperatures T1 and T2 inside and outside the FPGA1. A control part 5 selects an operation mode from preliminarily set two or more operation modes on the basis of the temperatures T1 and T2 inside and outside the FPGA1, and instructs the application of the setting data corresponding to the selected operation mode to a configuration part 2. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008269302(A) 申请公布日期 2008.11.06
申请号 JP20070111588 申请日期 2007.04.20
申请人 FUJI HEAVY IND LTD 发明人 TODA SANEHIRO
分类号 G06F1/00 主分类号 G06F1/00
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