发明名称 Multi-queue FIFO memory devices that support flow-through of write and read counter updates using multi-port flag counter register files
摘要 Multi-queue first-in first-out (FIFO) memory devices include multi-port register files that provide write count and read count flow-through when the write and read queues are equivalent. According to some of these embodiments, a multi-queue FIFO memory device includes a write flag counter register file that is configured to support flow-through of write counter updates to at least one read port of the write flag counter register file. This flow-through occurs when an active write queue and an active read queue within the FIFO memory device are the same. A read flag counter register file is also provided, which supports flow-through of read counter updates to at least one read port of the read flag counter register file when the active write queue and the active read queue are the same.
申请公布号 US7447812(B1) 申请公布日期 2008.11.04
申请号 US20050080704 申请日期 2005.03.15
申请人 INTEGRATED DEVICE TECHNOLOGY, INC. 发明人 MO JASON ZHI-CHENG;SHAMARAO PRASHANT;SU JIANGHUI
分类号 G06F3/00;G06F5/10;G06F13/14 主分类号 G06F3/00
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