发明名称 Electric Counter Circuit
摘要 An electric counter circuit ( 30, 40, 80 ) comprises a clock generator ( 1, 54, 111, 120, 130 ) for generating a plurality of clock signals ( 21 - 24, 121 - 125, 131 - 134 ) and a sampling device ( 32, 81 ) for sampling the clock signals ( 21 - 24, 121 - 125, 131 - 134 ) at a first moment in time when a first characteristic signal section (LE) of a digital signal (DS) appears. Furthermore, the circuit ( 30, 40, 80 ) comprises a calculation device ( 33 ) for calculating the time between the first moment and a second moment which is later than the first moment. This calculation is based on the clock signals ( 21 - 24, 121 - 125, 131 - 134 ) at the first moment and based on the clock signals ( 21 - 24, 121 - 125, 131 - 134 ) at the second moment. The clock signals ( 21 - 24, 121 - 125, 131 - 134 ) each have the same cycle duration (T) and are phase-shifted with respect to each other.
申请公布号 US2008267016(A1) 申请公布日期 2008.10.30
申请号 US20060097039 申请日期 2006.12.06
申请人 NXP B.V. 发明人 SPINDLER ROBERT;BRANDL ROLAND;BERGLER EWALD
分类号 G04F10/04 主分类号 G04F10/04
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