Semiconductor switch with integrated delay circuit

摘要

The stage (600) has an input for inputting a pulse width modulation signal. A power semiconductor switch (602) controls an electric load according to a duty cycle of the signal. A pulse width modulation delay circuit (603) generates another pulse width modulation signal that is delayed relative to the former signal. A signal output outputs the latter signal. A detector circuit of the delay circuit detects a period duration of the former signal and generates the latter signal such that detector circuit is delayed relative to the former signal by a preset fraction of a detected period duration. Independent claims are also included for the following: (1) a controller for pulse width-modulated control of an electric load, comprising a set of electrically independent load stages (2) a method for pulse width-modulated controlling of an electric load with a set of electrically independent stages.