发明名称 DVI link with parallel test data
摘要 An embodiment includes encoding parallel digital data into encoded and parallel digital data in an encoder and generating parallel test data in a pseudo-random binary sequence generator circuit. The encoded and parallel digital data is coupled through a multiplexer to be serialized in a serializer in a normal mode of operation and the parallel test data is coupled through the multiplexer to be serialized in the serializer in a test mode of operation. Encoded and serial digital data are transmitted to a transmission medium in the normal mode, and serial test data are transmitted to the transmission medium in the test mode. The encoder, the serializer, the sequence generator circuit, and the multiplexer may be fabricated in a single integrated circuit chip. The parallel test data may be parallel pseudo-random binary sequence data. The parallel digital data may include data to generate colors in a visual image.
申请公布号 US7441172(B2) 申请公布日期 2008.10.21
申请号 US20060330791 申请日期 2006.01.12
申请人 MICRON TECHNOLOGY, INC. 发明人 WARNER DAVID J.;HUNT KEN S.;LEVER ANDREW M.
分类号 G01R31/28;G06F11/00;H04N17/00 主分类号 G01R31/28
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