发明名称 Method for manufacturing semiconductor device
摘要 In a MOSFET, after an element region is formed, a wiring layer is formed subsequently to a barrier metal layer, and hydrogen annealing is performed. However, in the case of an n-channel MOSFET, a threshold voltage is lowered due to an occlusion characteristic of the barrier metal layer. Thus, an increased impurity concentration in a channel layer causes a problem that reduction in an on-resistance is inhibited. According to the present invention, after a barrier metal layer is formed, an opening is provided in the barrier metal layer on an interlayer insulating film, and hydrogen annealing treatment is performed after a wiring layer is formed. Thus, an amount of hydrogen which reaches a substrate is further increased, and lowering of a threshold voltage is suppressed. Moreover, since an impurity concentration in a channel layer can be lowered, an on-resistance is reduced.
申请公布号 US7439137(B2) 申请公布日期 2008.10.21
申请号 US20050123248 申请日期 2005.05.06
申请人 SANYO ELECTRIC CO., LTD. 发明人 ISHIDA HIROYASU;KUBO HIROTOSHI;MIYAHARA SHOUJI;ONDA MASATO
分类号 H01L21/28;H01L21/336;H01L21/30;H01L21/31;H01L21/322;H01L21/469;H01L21/768;H01L21/8234;H01L27/10;H01L29/417;H01L29/45;H01L29/74;H01L29/78 主分类号 H01L21/28
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