发明名称 Minimizing resist poisoning in the manufacture of semiconductor devices
摘要 The present invention provides a method for manufacturing an interconnect and a method for manufacturing an integrated circuit including the interconnect. The method of manufacturing an interconnect, among other steps, includes forming a via ( 160 ) in a substrate ( 130 ) and then forming a base getter material ( 210 ) in the via ( 160 ). The method further includes forming a photoresist layer ( 410 ) over the base getter material ( 210 ), the photoresist layer ( 410 ) having an opening ( 420 ) therein positioned over the via ( 160 ), and etching a trench ( 510 ) into the substrate ( 130 ) using the opening ( 420 ) in the photoresist layer ( 410 ).
申请公布号 US7425502(B2) 申请公布日期 2008.09.16
申请号 US20070828217 申请日期 2007.07.25
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 LU ZHIJIAN;WOLF THOMAS M.;JESSEN SCOTT W.
分类号 H01L21/04 主分类号 H01L21/04
代理机构 代理人
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