| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device reducing current consumption and circuit scale without delaying read/write operation. SOLUTION: The semiconductor memory device is provided with memory cells MC storing data according to the number of majority carriers in a floating body, word lines WL connected to gates of the memory cells, a pair of bit lines BLL, bBLL transmitting data of the memory cells, a pair of sense nodes SN, bSN connected to the pair of bit lines and transmitting data of the memory cells, a plurality of transfer gates TGL1, connected between the pair of bit lines and the pair of sense nodes, latch circuits latching a first high level potential VBLH1 to one of the pair of sense nodes and latching a low level potential VSS to the other, and level shifter LSL applying a second high level potential VBLH2 being higher than the first high level potential to one of the pair of bit lines in accordance with a potential latched to the pair of sense nodes during data write or rewrite. COPYRIGHT: (C)2008,JPO&INPIT
|
