发明名称 Network switch with a parallel shared memory
摘要 A network switch includes an input layer to receive a data stream with a set of cells. Each cell includes data and a header to designate a destination device. The input layer includes a set of input layer circuits. A selected input layer circuit of the set of input layer circuits receives the data stream. The selected input layer circuit includes a set of queues corresponding to a set of destination devices. The selected input layer circuit is configured to assign a selected cell from the data stream to a selected queue of the set of queues. The selected queue corresponds to a selected destination device specified by the header of the selected cell. An intermediate layer includes a set of intermediate layer circuits, each intermediate layer circuit has a set of buffers corresponding to the set of destination devices. A selected intermediate layer circuit of the set of intermediate layer circuits receives the selected cell and assigns the selected cell to a selected buffer corresponding to the selected destination device. An output layer includes a set of output layer circuits corresponding to the set of destination devices. A selected output layer circuit of the set of output layer circuits stores the selected cell prior to routing the selected cell to a selected output layer circuit output node.
申请公布号 US7420969(B2) 申请公布日期 2008.09.02
申请号 US20010939454 申请日期 2001.08.24
申请人 RMI CORPORATION 发明人 SIU KAI-YEUNG (SUNNY);YANG BRAIN HANG WAI;RAHMAN MIZANUR M.
分类号 H04L12/50;H04L12/56 主分类号 H04L12/50
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