METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING BI-LAYER GATE ELECTRODE
摘要
<p>A method for forming a semiconductor device having a bi-layer gate electrode is provided to implement a flash memory device having high erase efficiency and excellent data retention by increasing a work function of a control gate electrode. A tunnel dielectric(15) is formed on a semiconductor substrate(11). A charge trap layer(17) is formed on the tunnel dielectric. A shield dielectric(19) is formed on the charge trap layer. A first conductive layer is formed on the shield dielectric. Chlorine treatment is performed on the first conductive layer to form a Cl doped conductive layer(21'). A second conductive layer(25) is formed on the Cl doped conductive layer. The chlorine treatment is performed by exposing the semiconductor substrate having the first conductive layer to a Cl plasma atmosphere. The charge trap layer is formed with a nitride layer. A thickness of the first conductive layer is 1 nm to 10 nm. The second conductive layer is formed with a material layer having a work function of 4.5 eV to 6.0 eV.</p>
申请公布号
KR20080079492(A)
申请公布日期
2008.09.01
申请号
KR20070019746
申请日期
2007.02.27
申请人
SAMSUNG ELECTRONICS CO., LTD.
发明人
KIM, HYE MIN;HYUN, SANG JIN;CHOI, SI YOUNG;JEON, IN SANG;KANG, SANG BOM