发明名称 STACK PACKAGE
摘要 <p>A stack package is provided to prevent a leakage current and a short-circuiting phenomenon due to a contact between a wire and an upper semiconductor chip by using a dual-layer WBL tape. An electrode terminal(200) is formed on one surface of a PCB(Printed Circuit Board)(202), in which a circuit pattern is formed. A first semiconductor chip(206) is arranged on the PCB via an adhesive agent(204), while a second semiconductor chip(216) is arranged on the PCB via a WBL tape(214). The WBL(Wafer Backside Lamination) tape includes a first hard film(210) and a second soft film(212). The first film contains a first filler with a first size, while the second film contains a second filler with a second size, which is greater than the first size. A metal wire is bonded on the PCB to electrically couple the first semiconductor chip with the electrode terminal of the PCB. A sealing agent(218) is used to seal an upper surface of the PCB.</p>
申请公布号 KR20080075704(A) 申请公布日期 2008.08.19
申请号 KR20070014970 申请日期 2007.02.13
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, KI YOUNG;CHO, LL HWAN
分类号 H01L23/12 主分类号 H01L23/12
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