发明名称 CIRCUIT FOR GENERATING ON DIE TERMINATION CONTROL SIGNAL
摘要 A circuit for generating an on-die termination control signal is provided to prevent adjustment error according as performing on-die termination calibration operation in a period except normal operation period. A first signal generation part(100) generates a first signal to prevent first on-die termination calibration during a fixed period in order to change a voltage or a frequency. A second signal generation part(200) generates a second signal in order to perform second on-die termination calibration operation at initial time of operation. A signal output part(300) outputs an on-die termination control signal by assembling the first signal and the second signal. The fixed period includes a self refresh period.
申请公布号 KR100845807(B1) 申请公布日期 2008.07.14
申请号 KR20070057582 申请日期 2007.06.13
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, NAK KYU
分类号 G11C7/10 主分类号 G11C7/10
代理机构 代理人
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