| 摘要 |
A method for planarizing an interlayer dielectric of a semiconductor device is provided to prevent drop particles and to improve yield by forming simultaneously a cylindrical capacitor on a cell and a scribe regions. A cylindrical capacitor is formed on a cell region(300) of a substrate, and a cylindrical vernier(430) is simultaneously formed on a scribe region of the substrate. An interlayer dielectric(440) is filled in the cylindrical capacitor and the cylindrical vernier. A mask pattern(450) is formed on the interlayer dielectric to selectively expose the cell and the scribe regions. The interlayer dielectric of the cell and the scribe region is etched by using the mask pattern, thereby removing the step difference with a peripheral region(310). Then, the interlayer dielectric is planarized.
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