FORMING METHOD OF ISOLATION LAYER IN SEMICONDUCTOR DEVICE

摘要

A method for forming an isolation layer of a semiconductor device is provided to suppress generation of a void within an isolation layer by using a PSZ(PolySilaZane). A gate insulating layer(11) and a conductive layer(12) for gate electrode are sequentially formed on an upper surface of a substrate(10). A pad nitride layer(13) is formed on the upper surface of the substrate. A trench is formed by etching the pad nitride layer and the substrate. An isolation layer(15A) is deposited on the pad nitride layer to bury the trench. The isolation layer is planarized by removing the isolation layer from the pad nitride layer. A first thermal process for the isolation layer is performed. The pad nitride layer is removed.