发明名称 |
Double silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) structures |
摘要 |
A SOI MOSFET structure having a reduced step height between the various semiconductor layers without adversely affecting the junction capacitance of the semiconductor device formed on the uppermost semiconductor layer as well as a method of fabricating the same are provided. The structure of the present invention includes an elevated device region having at least one semiconductor device located on a second semiconductor layer. The elevated device region further includes a source/drain junction that extends from the second semiconductor layer down to a first buried insulator layer that is located on an upper surface of the semiconductor substrate. The structure also includes a recessed device region having at least one semiconductor device located atop a first semiconductor layer which is located on an upper surface of the first buried insulator. An isolation region separates the elevated device region from the recessed device region.
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申请公布号 |
US7393732(B2) |
申请公布日期 |
2008.07.01 |
申请号 |
US20060351184 |
申请日期 |
2006.02.09 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
RIM KERN |
分类号 |
H01L21/00;H01L21/84;H01L27/12;H01L29/04;H01L29/10;H01L29/786 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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