发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGNING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a method for correcting logic in semiconductor integrated circuits. SOLUTION: In the designing method of a semiconductor integrated circuit for generating a semiconductor integrated circuit, by arranging and wiring a plurality of types of functional cells in a prescribed region based on circuit connection information, at least one type of auxiliary cell, capable of realizing a plurality of logics by replacing wiring, is prepared; a plurality of types of functional cells is arranged and wired based on the circuit connection information, at least one arbitrary auxiliary cell that can be arranged in a free yet to be used region of a prescribed region, and a logic is corrected using the auxiliary cell arranged at the yet to be used region, when the circuit connection information is changed. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008147477(A) 申请公布日期 2008.06.26
申请号 JP20060334144 申请日期 2006.12.12
申请人 SEIKO EPSON CORP 发明人 TERASAWA ETSUKO;SEKI HIROSHI;TAKAHANE TOSHIYUKI
分类号 H01L21/82;H01L21/822;H01L27/04 主分类号 H01L21/82
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