METHOD FOR FORMING VIA HOLE OF SEMICONDUCTOR DEVICE

摘要

A method for forming a via hole of a semiconductor device is provided to avoid the generation of polymer caused by etching of an interlayer dielectric by eliminating the necessity of a process for etching an interlayer dielectric to form a via hole on a substrate. A sacrificial layer pattern having an arbitrary pattern is formed on a conductive unit formed in a substrate(21). A thick interlayer dielectric(27) is deposited on the front surface of the substrate to cover the sacrificial layer pattern. The interlayer dielectric is flatly removed until the upper part of the sacrificial layer pattern is exposed. The sacrificial layer pattern is removed to form a via hole selectively exposing the upper part of the conductive unit. The sacrificial layer pattern can be a photoresist pattern(25). The photoresist pattern can be a pattern whose lateral tilt can be adjusted by an exposure quantity.