发明名称 Digital broadcasting receiver
摘要 A demodulation circuit generates information related to the frequency of error correction, and feeds the information to a CPU. The CPU acquires noise intensity data on the basis of the information related to the frequency of error correction from the demodulation circuit in view of noise intensity data corresponding to the frequency of error correction stored in a memory. The CPU feeds the acquired noise intensity data to a D/A converter. The D/A converter feeds a noise control voltage to a voltage controlled amplifier. Noises produced in a noise source are overlaid on a signal in an adder after the intensity thereof is adjusted in the voltage controlled amplifier.
申请公布号 US7391823(B2) 申请公布日期 2008.06.24
申请号 US20010930129 申请日期 2001.08.16
申请人 SANYO ELECTRIC CO. 发明人 SHIBUSAWA TORU
分类号 H04L27/06;H04B1/10;H04B1/16;H04L1/20;H04N5/44;H04N5/445;H04N17/04 主分类号 H04L27/06
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