DECODING DEVICE AND DECODING METHOD

摘要

[PROBLEMS] To provide a decoder configuration capable of effectively coping with various Z even if the in-block parallel degree is fixed in MP decoding of pseudo-cyclic LDPC codes. [MEANS FOR SOLVING PROBLEMS] A decoding device (6) includes reception value aligning means (601) and message aligning means (604, 607). The reception value aligning means (601) holds the first S or less reception value data from the block head. If the block size Z is not a multiple of S, (S - (Z mod S)) data of the head of the block are added to the end of the reception value data of the block so that the block size is a multiple of S. The block size is written into a reception value memory. The message aligning means (604, 607) perform cyclic permutation in record unit corresponding to the block offset value between a column processing module or a row processing module and the message memory. If Z is not a multiple of S, the first (S - (Z mod S)) messages from the block output head are added to the end of the output message of the block so that the Z is a multiple of S and is outputted to the message memory.