| 摘要 |
In a HEMT with a spacer layer composed of a 3 nm-thick intrinsic InAlAs layer, a supply layer composed of a 4 nm-thick n-type InAlAs layer, and a barrier layer composed of a 5 nm-thick intrinsic InAlAs layer, the spacer layer and supply layer exist between a channel layer and a planar-doped layer and the total thickness of these layers is approximately 7 nm. For this reason, the impurity (Si) in the planar-doped layer never diffuses into the channel layer, making available an excellent low-noise characteristic. In addition, since an intrinsic semiconductor layer is used as the barrier layer, it is possible to obtain an adequate gate withstand voltage even if the barrier layer is made thinner. It is therefore possible to cancel the degradation of the transconductance gm by thinning the barrier layer.
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