发明名称 Trenched mosfet device configuration with reduced mask processes
摘要 A semiconductor power device comprising a termination area that includes a trenched gate runner electrically connected to a trenched gate of said semiconductor power device. The semiconductor power device further includes a trenched field plate disposed in a trench opened in the termination area and the trenched field plate is electrically connected to the trenched gate runner. A gate runner contact trench and a field plate contact trench opened through an insulation layer covering the gate runner and the trenched field plate for extending into a doped gate dielectric filling in the trenched gate runner and the field plate wherein the gate runner contact trench and the field plate contact trench filled with a gate runner contact plug and a field plate contact plug respectively. A gate metal disposed on top of the insulation layer to electrically contact the gate runner contact plug and the field plate contact plug for electrically interconnecting the trenched gate runner and the trenched field plate.
申请公布号 US2008121986(A1) 申请公布日期 2008.05.29
申请号 US20060519754 申请日期 2006.09.11
申请人 FORCE-MOS TECHNOLOGY CORP., LTD. 发明人 HSHIEH FWU-JUAN
分类号 H01L29/78 主分类号 H01L29/78
代理机构 代理人
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