| 摘要 |
A method of manufacturing a CMOS device is provided to prevent contact resistance between a resistor of a gate pattern and a contact plug from being increased. A first conductive type active region(a) and a second conductive type active region(b) are defined in a semiconductor substrate(50). A first gate pattern(56a) and a second gate pattern(56b) are formed on the first and second conductive type active regions, respectively. The first conductive type active region is implanted with a second conductive type impurity using the first gate pattern, and a counterdoping layer(58) of a second conductive impurity is formed on the first gate pattern. The second conductive type active region is implanted with first conductive type impurity using the second gate pattern. The first gate pattern is implanted with the first conductive type impurity to remove the counterdoping layer.
|
