发明名称 Methods for tiling integrated circuit designs
摘要 Methods for routing in the design of integrated circuits (ICs) to simplify the routing task. The method includes dividing a given IC design into a limited number of non-overlapping tiles, and then routing all tiles in parallel, each tile being independently routed by a standard router. Thereafter, routed tiles are assembled to form a routing solution for the entire IC. Details of exemplary methods are disclosed.
申请公布号 US7376921(B2) 申请公布日期 2008.05.20
申请号 US20060357823 申请日期 2006.02.17
申请人 ATHENA DESIGN SYSTEMS, INC. 发明人 FOTAKIS DIMITRIS K.;JUKL MILAN F.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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