| 摘要 |
An input buffer circuit is provided to reduce current consumption and to reduce noise sensitivity and to increase operation speed by using a first buffer and a second buffer selectively. A first buffer(200) buffers an input signal as a control signal is enabled. A second buffer(300) buffers the input signal as the control signal is enabled. The output of the first buffer or the second buffer is selectively outputted in response to the control signal. An input part(100) outputs an inversion control signal by receiving the control signal. The input part includes an inverter. An output part(400) comprises a first NAND gate(ND1) receiving the output of the first buffer and the inversion control signal, and a second NAND gate(ND2) receiving the output of the second buffer and the output of the first NAND gate.
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