| 摘要 |
An apparatus and a method for testing a memory device are provided to reduce time loss by latching a test pattern for testing the memory device to a page buffer automatically in the sequence of addresses. According to an apparatus for testing a memory device including a plurality of memory cells connected to at least a pair of bit lines and a page buffer storing data inputted/outputted from the memory cells temporarily, a pattern generation part(222) generates test pattern data for a test. A data block(226) stores the test pattern data generated by the pattern generation part, and latches the test pattern data to the page buffer sequentially according to a count signal. A counter part(223) counts page addresses to program the test pattern data according to the start of the test, and outputs a comparison signal by judging whether the counted page address is the last address or not. A control part(221) controls the operation of the data block according to a comparison signal of the address comparison part.
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