| 摘要 |
An erase verify method of a NAND flash memory device is provided to prevent read error by increasing margin between an erase verify voltage and a read voltage. According to an erase verify method of a NAND flash memory device, a power supply voltage is applied to a second bit line as precharging a first bit line with a first positive voltage. Selection transistors are turned on, and a ground voltage is applied to a word line of memory cell transistors, and a second positive voltage is applied to a source line connected to sources of the memory cell transistors and the selection transistors. Erase state of the memory cell transistor is sensed according to the discharge of charges precharged in the first bit line.
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