发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device includes a control signal generator for combining command signals applied from an external portion to generate a test signal; a set/reset signal generator for receiving a mode setting signal applied from an external portion in response to the test signal and generating a first set/reset signal when the mode setting signal is a signal that designates an individual set/reset; a test logic portion for storing and then outputting the mode setting signal in response to the test signal; a set/reset master signal generator for receiving the first set/reset signal to output a set/reset master signal for commonly controlling a test mode of internal blocks of the semiconductor memory device; and a test control signal generator for combining an output signal of the test logic portion to generate a plurality of control signals and generating the set/reset master signal as a plurality of test control signals in response to the plurality of control signals.
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申请公布号 |
US7362635(B2) |
申请公布日期 |
2008.04.22 |
申请号 |
US20060499156 |
申请日期 |
2006.08.04 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM KYUNG-HYUN;LEE JAE-WOONG |
分类号 |
G11C7/00;G11C8/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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