| 摘要 |
A CMOS device with an integral reverse connection protection circuit having a low impedance region, whose impedance becomes lowest when a Vcc pad to which is to be supplied power supply voltage and a GND pad to which is to be supplied ground potential are connected in reverse polarity. The low impedance region, Vcc pad and GND pad are electrically connected through a metal line and a metal line, and current is diverted into the low impedance region during the reverse connection so as to protect an internal circuit. Surge protection elements with identical characteristics are disposed in proximity to three sides or four sides of a pad, and each side of the pad and the surge protection element corresponding thereto are electrically connected to each other, so that surge current applied to the pad is dispersed to the plurality of surge protection elements to protect the internal circuit. |
