| 摘要 |
PROBLEM TO BE SOLVED: To control generation of a parasitic element at a channel end of a memory cell transistor. SOLUTION: The non-volatile semiconductor memory is provided with a semiconductor substrate 1, an element isolation insulating layer of STI structure formed within the semiconductor substrate 1, a channel region between the element isolation insulating layers, a gate insulating film 2 on the channel region, a floating gate electrode 3 on the gate insulating film 2, an intermediate insulating film 5 on the floating gate electrode 3, and a control gate electrode 6 on the intermediate insulating film 5. The element isolation insulating layer is constituted with thermal oxide films 7 formed to the bottom surface and side surface of the concave part of the semiconductor substrate and an STI insulating film 8 formed on the thermal oxide film 7 to fill the concave part, wherein a size W1 of the floating gate electrode 3 in the channel width direction is set larger than the size W2 of the channel width. COPYRIGHT: (C)2008,JPO&INPIT
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