| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a digital signal processor which curbs the increase of device components required for a process of a digital signal in which the sampling frequency of an input signal and that of an output signal are different from each other. <P>SOLUTION: A digital signal processor has: an arithmetic circuit 11 that performs a first digital signal process to an input signal SA sampled at a first sampling frequency f1 and performs a second digital signal process to a result of the first digital signal process; a timing control circuit 12 that controls the arithmetic circuit 11 to execute the first and second digital signal processes; and a control circuit 13 that monitors at least one of a data amount processed in the second digital signal process and a data amount to be transmitted in the input signal SA, and controls the timing control circuit 12 when the monitored data amount reaches to a predetermined value. <P>COPYRIGHT: (C)2008,JPO&INPIT |
