MASK PATTERN DESIGN METHOD, MASK PATTERN DESIGN DEVICE, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

摘要

It is possible to reduce the processing time of the optical proximity effect correction (OPC). A mask layout pattern is generated by arranging a plurality of cells which have been subjected to the OPC process. Next, the mask layout pattern is divided into a plurality of separated areas (SA). Each of the separated areas (SA) is configured by a cell as a base and has information on the cell and information on reference region including a part of the design pattern of the other cells adjacent to the cell. Subsequently, adjustment for OPC optimization is performed in parallel on each of the separated areas (SA). Here, the figures of the reference regions are updated between the adjacent separated areas (SA). After this, the separated areas (SA) subjected to the optimization process are integrated to prepare a mask layout pattern.