发明名称 AMPLIFICATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an amplification circuit capable of achieving high linearity without being affected by variance in manufacturing transistors. SOLUTION: DC voltages VinA, VinB at two points are given to an input of the amplification circuit, outputs VoutA, VoutB thereof are held by a sample/hold circuit SH1/SH2, and operation to derive a coefficient (q) based on the values is performed by an operational circuit AMP1, and operational results are compared with the last operational results held in a sample/hold circuit SH4 by a comparator circuit CMP1 and when the operational results of the operational circuit AMP1 are smaller than the last operational results, a bias control circuit BC1 reduces a bias current ratio (m). Thus, the coefficient (q) of the bias current ratio least reducing third-order distortion of the amplification circuit is determined by itself and high-linearity amplifying operation is performed by the optimum bias current. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008061126(A) 申请公布日期 2008.03.13
申请号 JP20060238142 申请日期 2006.09.01
申请人 SHARP CORP 发明人 AZUMA SHINICHIRO
分类号 H03F1/32 主分类号 H03F1/32
代理机构 代理人
主权项
地址