Feldeffekttransistor mit einem Anschlussdielektrikum und DRAM-Speicherzelle

摘要

The transistor has a gate dielectric layer (11) between a gate-electrode and a canal region (81). The gate dielectric layer has a gate dielectric layer-thickness and a terminal dielectric layer (21) which is attached between a drain region (51) or a source region (41) and the gate-electrode. The terminal dielectric layer has a terminal dielectric layer-thickness, which is greater than gate dielectric layer-thickness. An independent claim is also included for a dynamic random access memory (DRAM) cell for attaching a memory capacitor to a field-effect transistor.