发明名称 Planar dual-gate field effect transistors (FETs)
摘要 A semiconductor structure and the associated method for fabricating the same. The semiconductor structure includes (a) a semiconductor substrate, (b) a back gate region on the semiconductor substrate, (c) a back gate dielectric region on the back gate region, (d) a semiconductor region on the back gate dielectric region comprising a channel region disposed between first and second source/drain (S/D) regions, (e) a main gate dielectric region on the semiconductor region, (f) a main gate region on the main gate dielectric region, (g) a first contact pad adjacent to the first S/D region and electrically insulated from the back gate region, and (h) a first buried dielectric region that physically and electrically isolates the first contact pad and the back gate region, and wherein the first buried dielectric region has a first thickness in the first direction at least 1.5 times a second thickness of the back gate region.
申请公布号 US7335932(B2) 申请公布日期 2008.02.26
申请号 US20050907745 申请日期 2005.04.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ANDERSON BRENT A.;BRYANT ANDRES;NOWAK EDWARD J.
分类号 H01L29/76 主分类号 H01L29/76
代理机构 代理人
主权项
地址