LOW RESISTANCE GATE FOR POWER MOSFET APPLICATIONS AND METHOD OF MANUFACTURE
摘要
A trench gate field effect transistor is formed as follows. A trench is formed in a semiconductor region, followed by a dielectric layer lining sidewalls and bottom of the trench and extending over mesa regions adjacent the trench. A conductive seed layer is formed in a bottom portion of the trench over the dielectric layer. A low resistance material is grown over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.
申请公布号
WO2007095438(A3)
申请公布日期
2008.02.14
申请号
WO2007US61717
申请日期
2007.02.06
申请人
FAIRCHILD SEMICONDUCTOR CORPORATION;SREEKANTHAM, SREEVATSA;HO, IHSIU;SESSION, FRED;NAYLOR, JAMES, KENT
发明人
SREEKANTHAM, SREEVATSA;HO, IHSIU;SESSION, FRED;NAYLOR, JAMES, KENT