发明名称 SEMICONDUCTOR WAFER, METHOD OF MANUFACTURING SEMICONDUCTOR CHIP, AND SEMICONDUCTOR WAFER PROBE INSPECTION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a method capable of reducing occurrence of burr caused by a gap of a metal generated in a pad at dicing, and executing probe inspection via a process controlling monitor without problems. SOLUTION: When probe inspection is executed for a manufacturing process of a semiconductor chip via a process controlling monitor; a pad 5 used as an electrode of the process controlling monitor is laminated by a plurality of wiring layers 7, each wiring layer 7 is connected by via holes 6 to increase the adherence strength of each wiring layer 7, and then, dicing is carried out so that the via holes 6 are left. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008034783(A) 申请公布日期 2008.02.14
申请号 JP20060310867 申请日期 2006.11.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKASHITA TOSHIHIKO;WATASE KAZUMI
分类号 H01L21/66;H01L21/3205;H01L23/52 主分类号 H01L21/66
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