发明名称 METHOD FOR DQ COMPRESS FOR DQ COMPRESS TEST MODE AND CIRCUIT THE SAME
摘要 PURPOSE: A method for compressing DQ for a DQ compress test mode and a circuit for the same are provided to utilize as a leakage current generated from a cell to a cell and a test resource as well as to search a defected bit memory effectively at a short time in comparison with a conventional method. CONSTITUTION: A method for compressing DQ for a DQ compress test mode includes the steps of: determining an input/output of a specific data by a designer; inputting a signal fed back the output values of the data input buffer during the option mode(X4,X8,X16) and the DQ compress mode, inputting the output values of the four data input buffers determined among the remaining data input buffers except the specific data input/output by the designer, inputting the inputted data values to the write driver in response to DQ compress test mode, inputting the data valued to be used at the DQ compress mode by a user to the DQ pads not used when the DQ compress test mode is a checker board, inputting data opposite to each other to be used at the DQ compress modes and utilizing the same data at four write drivers at once by the DQ pads to be used for the DQ compress not to input the output signals of the data input buffers which is not utilized as the DQ compress modes when the DQ compress test mode is a solid state.
申请公布号 KR100800133(B1) 申请公布日期 2008.02.01
申请号 KR20010056508 申请日期 2001.09.13
申请人 发明人
分类号 G11C29/00 主分类号 G11C29/00
代理机构 代理人
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