发明名称 Programmable logic enabled dynamic offset cancellation
摘要 Techniques and circuitry are provided for programmatically controlling signal offsets in integrated circuitry. In one embodiment, a buffer circuit having an offset cancellation circuit receives a signal and transmits the signal to programmable logic circuit. The programmable logic uses programmable resources and/or one or more algorithms to measure integrated circuit operations and/or operational errors associated with the offset. The control signal is fed back to an input of the offset cancellation circuit. In one embodiment, the offset cancellation circuit adjusts the offset of the signal in response to the magnitude of the offset cancellation signal received until changes associated with the offset and/or the magnitude of the operational errors are no longer attributable to the offset.
申请公布号 US7321259(B1) 申请公布日期 2008.01.22
申请号 US20050245581 申请日期 2005.10.06
申请人 ALTERA CORPORATION 发明人 SHUMARAYEV SERGEY YURYEVICH
分类号 H03F1/02;H04B1/04 主分类号 H03F1/02
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