| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce the area of a nonvolatile memory circuit unit which is provided on a semiconductor device. <P>SOLUTION: P-type wells HPW1 to HPW3 are provided separately from each other in the n-type buried well DNW of a semiconductor substrate 1S in a flash memory forming region; and a capacitor unit C, a data writing/erasing electric charge injection/discharge unit CWE, and a data readout MISFET QR are arranged in each of the p-type wells HPW1 to HPW3. The capacitor unit C is arranged between the data writing/erasing electric charge injection/discharge unit CWE and the data readout MISFET QR. Writing and erasure of data are carried out by the data writing/erasing electric charge injection/discharge unit CWE by the use of an FN tunnel current of a whole channel surface. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
