Phase-locked loop control circuit

摘要

An electrical circuit is disclosed, which comprises a phase locked loop (PLL) circuit and a PLL start-up circuit configured to selectively provide a reference signal to the phase locked loop circuit based upon relative frequencies of an input signal to the phase locked loop circuit and an output signal of the phase locked loop circuit. Further, a method for controlling a phase locked loop circuit is disclosed, which comprises the step of selectively providing a reference signal to the phase locked loop circuit in response to relative frequencies of an input signal to the phase locked loop circuit and an output signal of the phase locked loop circuit.