| 摘要 |
A current steering digital-to-analog converter (DAC) is provided. At least two lower-resolution DACs are used for converting a high-resolution digital signal. One of the two lower-resolution DACs is used for converting the most significant bits (MSB) of the high-resolution digital signal. The other of the two lower-resolution DACs is used for converting the least significant bits (LSB) of the high-resolution digital signal. By such arrangement, a device mismatch problem is avoided and the chance of variation occurrence during manufacturing process is reduced. The arrangement also simplifies the layout in the significantly scaled-down chip area.
|
