发明名称 Deterministic System and Method for Generating Wiring Layouts for Integrated Circuits
摘要 The present disclosure generally pertains to automatic wiring systems and methods for generating wiring layouts for integrated circuits. In one exemplary embodiment, a wiring router ensures that the wiring for multiple device segments is matched. That is, the wiring router defines the wiring paths such that the same or substantially similar localized metal patterns exist around each of the device segments. Thus, when an integrated circuit (IC) chip is manufactured according to the wiring layout, the IC chip should be less susceptible to the effects of process variations.
申请公布号 US2007294656(A1) 申请公布日期 2007.12.20
申请号 US20070840050 申请日期 2007.08.16
申请人 BOWEN C T 发明人 BOWEN C. T.
分类号 G06F17/50 主分类号 G06F17/50
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