BURIED BIASING WELLS IN FETs (Field Effect Transistors)

摘要

A method for fabricating a semiconductor structure. The semiconductor structure comprises first and second source/drain regions; a channel region disposed between the first and second source/drain regions; a buried well region in physical contact with the channel region; and a buried barrier region being disposed between the buried well region and the first source/drain region and being disposed between the buried well region and the second source/drain region, wherein the buried barrier region is adapted for preventing current leakage and dopant diffusion between the buried well region and the first source/drain region and between the buried well region and the second source/drain region.