SPEICHERZUGRIFFSVERFAHREN UND SCHALTUNGSANORDUNG

摘要

A cache memory serves for accelerating accesses to an external memory of a microprocessor. Instead of an actually occurring hit event, a cache miss is signaled to the microprocessor. The reversal is randomly controlled. This disguises the current profile of cache hit and miss events, which enhances the security against statistical attack techniques based on the evaluation of the current profile.