发明名称 |
Method of reducing stress on a semiconductor die with a distributed plating pattern |
摘要 |
A substrate, and a semiconductor die package formed therefrom, are disclosed which include a distributed plating pattern for reducing mechanical stress on the semiconductor die. The substrate according to embodiments of the invention may include traces and contact pads plated in a double image plating process. Additionally, the substrate may include dummy plating areas including plating material. The plated vias and/or traces and the plating material within the dummy plating areas provide a plating pattern which is evenly distributed across the surface of the substrate. The even distribution of the plating pattern prevents peaks and valleys in the finished substrate.
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申请公布号 |
US2007269929(A1) |
申请公布日期 |
2007.11.22 |
申请号 |
US20060435954 |
申请日期 |
2006.05.17 |
申请人 |
LIAO CHIH-CHIN;CHEN HAN-SHIAO;CHIU CHIN-TIEN;YU CHEEMEN;TAKIAR HEM |
发明人 |
LIAO CHIH-CHIN;CHEN HAN-SHIAO;CHIU CHIN-TIEN;YU CHEEMEN;TAKIAR HEM |
分类号 |
H01L21/00;H01L21/31 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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