发明名称 Memory circuit
摘要 A memory circuit is provided comprising a memory cell, a pair of conducting lines operable to signal the logic state of the memory cell and read circuitry operable to perform a read operation by detecting a voltage level of at least one of the pair of conducting lines. The memory circuit comprises a pull-down circuit having an on configuration in which it is operable to pull-down a voltage level of at least one of the pair of conducting lines so as to affect the read operation and an off-configuration in which the pull-down circuit cannot affect the read operation. Control circuitry is provided to control whether the pull-down circuit is in the on configuration or the off configuration. The memory circuit can be incorporated in a data processing apparatus and a method of operating a memory circuit is provided in which a pull-down circuit is controlled to be in an on configuration or in an off configuration.
申请公布号 US2007268755(A1) 申请公布日期 2007.11.22
申请号 US20060436983 申请日期 2006.05.19
申请人 ARM LIMITED 发明人 NEW DAVID;HOXEY PAUL DARREN;BULL DAVID MICHAEL;DAS SHIDHARTHA
分类号 G11C7/10 主分类号 G11C7/10
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