| 摘要 |
The invention relates to a circuit arrangement for production of a reset signal after a supply voltage (Vdd) has fallen and risen again, which circuit arrangement has two cross-coupled inverters (INV 1 , INV 2 ) and an initialization circuit (S) which is connected to the input of one of the inverters (INV 2 ), in which case the outputs of the inverters (INV 1 , INV 2 ) are capacitively connected asymmetrically, andlor in which case the inverters (INV 1 , INV 2 ) have different transfer voltages.
|
